Internal protocol (IP) has become the standard for all forms of electronic communications including data, voice, video, etc. FIG. 1 is a chart comparing the transmission control protocol/internet protocol (TCP/IP) stack to the earlier model of the open systems interconnection (OSI) protocol stack. As shown in FIG. 1, the OSI stack differentiated seven layers. These included the application layer (7), presentation layer (6), session layer (5), transport layer (4), network layer (3), data link/media access control (MAC) layer (2), and the physical layer (1). The TCP/IP stack formally has five layers which accomplish the services of the original OSI stack. When one application wants to communicate with another application, data runs up and down the layers in the stack. That is, data is passed from an application layer down through each of the layers before it actually moves out onto a physical connection. And, similarly at a receiving end the data is passed from the physical layer up through each of the layers to a recipient application.
A layer 3 switch in a receiving network device will modify an Ethernet packet header as it flows back up the TCP/IP stack. This creates an issue for protecting a packet from soft errors. In other words, an Ethernet cyclical redundancy check (CRC) that is part of the packet as it enters the layer 3 switch will no longer be valid if the header portion of the packet is modified. Some approaches ignore the error check detection associated with the Ethernet CRC while packet header modification occurs in going through a layer 3 switch since a new Ethernet CRC will be generated upon leaving the layer 3 switch. This may be done to avoid the overhead of having to continually change the Ethernet CRC over the course of the layer 3 switch operations. However, this ignores the soft errors that can occur as packets are passed in and out of memory and flip-flops as the packet moves through the layer 3 switch. Sometimes memory with error correcting code (ECC) logic is used to handle the soft errors which are otherwise ignored above. ECC is a memory system that tests for and corrects errors automatically. When writing the data into memory, ECC circuitry generates checksums from the binary sequences in the bytes and stores them in an additional seven bits of memory for 32-bit data paths or eight bits for 64-bit paths. When data are retrieved from memory, the checksum is recomputed to determine if any of the data bits have been corrupted. To note, ECC involves additional memory associated with the ECC bits, which increases the cost. The ECC operation also takes time, slowing the memory interface down. Even with ECC memory, the flip-flops in the data path are not protected from soft errors.